A processor is the central computing element of any computer, IoT device, or Embedded System. It holds very fast but also very small memory called registers and executes small instructions divided into:

• Arithmetic operations on registers (+,-, *, /, or, and, xor, ...)
• Control Flow Operations (decide where to execute next)
• Memory Operations (moving data from the registers to main memory and vice versa)
• Processor Status Operations (managing security features like MMU, Processor Modes).

The register file and the instructions of a processor build its Instruction Set Architecture (ISA). Many Instructions form a program (the Software running on the processor).

Processors are built as general-purpose machines, so they can solve any problem, but not always very fast nor very efficient. Also, most programs only use a very small subset of the available instructions and registers.

Application Specific Processors (ASPs) have been around in research for a long time. In general, they are optimized or adapted processors for a specific application domain. Domains are full application areas but also just one application.

In contrast to typical general-purpose processors they are faster, more efficient, or more secure in their specific application domain.

ASP Categories

Today they divide into two broad categories:

• Executing Software

  ASPs in this category are sometimes also called Application Specific Instruction Set Processors (ASIPs). These ASPs are based on available/ existing Instruction Set Architectures (ISAs), e.g. RISC-V, x86, or Armv7. Their ISA is extended to support a specific application area better. Typical application areas for these ASPs are

  • Cryptography
  • Video Encoding/Decoding
  • Vector Calculation

  There are two very important points to highlight for this category of processors:

  • The goals of this category of ASPs are computing performance and efficiency.
  • As every standard processor this category executes software.
• Pure Hardware

  This category of ASPs is very new, and the approach behind it is very different. Instead of extending existing ISAs, this approach generates ASPs from scratch, taking existing ISAs only as a guideline. Even the programs are converted from software to hardware, e.g. as a hardware implemented Finite State Machine (FSM).

  • The goals of this category of ASPs are structural elimination to increase trustworthiness and security
  • It does not run software but executes the application purely in hardware

ASP Implementation/ Production

Both categories of ASPs have two different implementation or production kinds.

• Application Specific Integrated Circuits (ASICs)

  ASICs are the typical way of implementing/ producing hardware. A hardware design, e.g. for a processor, is provided to a chip factory and after some optimization to that specific production process some thousands Integrated Circuits (IC) are produced.

  Advantages
  • Cheap per IC for a large amount
  • ICs are able to run at high clock rates
  Disadvantages
  • Expensive for small batches
  • Long production times
  • No updates after production (ICs are fixed)
• Field Programmable Gate Arrays (FPGAs)

  FPGAs are often used in prototyping. They are specially designed ASICs, which support hardware being configured to it after production. Most of the design steps for ASICs and FPGAs are the same, except the last step, mapping a hardware design to the implementing technology. Most FPGAs can be reconfigured many times.

  Advantages
  • Cheap for small batches
  • Fast configuration times (seconds)
  • Reconfigurable, so updates to hardware possible
  Disadvantages
  • More expensive compared to ICs for large batches
  • Limited maximum clock rate (< 1 GHz in general)

Pure Hardware ASPs

This article focuses on the second category of ASPs. It will provide an overview on how they are developed, where they can be of use, and how they improve the security and efficiency of computing systems.

From Software to Hardware

The image above shows the design flow of a pure hardware ASP.

1. The development starts with an application written in a high-level programming language like C or C++. Rust might also be a possibility in the future but is not supported right now.
   A compiler like GCC or clang compiles all source files of this application to RISC-V assembler files. Assembler code is a human-readable form of a processor's instructions.

   C

   int sum(int *p, int n) {
     int s = 0;
     while (n > 0) {
       s += *p++;
       n--;
     }
     return s;
   }

   GCC / CLANG →

   RISC-V ASSEMBLY

   sum:
       mv    a5, zero      # s = 0
   loop:
       ble   a1, zero, end # n > 0?
       lw    t0, 0(a0)     # *p
       add   a5, a5, t0    # s += *p
       addi  a0, a0, 4     # p++
       addi  a1, a1, -1    # n--
       j     loop
   end:
       mv    a0, a5
       ret

   This step is nothing new and compilers have done it for the past decades.
2. This step is the important one. The tool asm2fsm analyzes the RISC-V assembly.
   On a software-based processor a program does not start from zero. Before it starts executing, its initial data has to be moved to main memory. On a PC that is the operating system's job, on an embedded device the startup code.
   asm2fsm extracts memory information from all the assembly files and builds a memory layout starting at a given start address. It also removes dead code from the assembly files. Dead code is instructions that the program's normal control flow never reaches. Dead code happens if the program uses only a subset of a library's functions.
   The output of this stage is the memory layout and the pure instruction flow of the program.
3. In another step asm2fsm converts the instruction flow into a Finite State Machine (FSM).
   The memory layout is copied in front of the FSM in the form of memory stores. So, before starting the program, the FSM itself moves the required initial data to memory and self-initializes.
   Converting the FSM to a hardware description language like VHDL is straightforward for any digital hardware engineer or even an AI today. The description is then merged into a System-on-Chip (SoC) framework which provides required peripherals like memory bus, interrupt management, and input/output. The explanation of a SoC framework is part of a future article.
4. The last step is running the synthesis, placement and routing, and mapping flow of the FPGA or ASIC targeted.

Advantages

• Structural Elimination A general-purpose processor runs any program, including one an attacker injects. The ASP runs only the single application it was built for. A buffer-overflow attack works by redirecting the processor to run attacker code, the ASP has no way to start running code it wasn’t built with. There is nothing to land on.
• No speculative execution Modern processors guess ahead to run faster, and that guessing is what makes side channels like Spectre possible. The FSM just steps through states in a fixed order — it never guesses, so that class of leak has no mechanism.
• Determinism On a processor with an OS, how long an operation takes varies with what else is running. On the ASP the same input always takes the same number of cycles. A real-time deadline is a fixed number, not an average.
• Efficiency The post’s intro already said a program uses only a small subset of the available instructions and registers. A general-purpose processor still pays for the whole set, a full register file, a decoder for the entire ISA, a branch unit. The ASP builds only what the application actually uses. Less hardware, less power, less space.

Some Application Areas

• Cryptographic engines Cryptographic algorithms are in general fixed and known. The processor just needs to execute them. ASPs can protect against side-channel attacks by providing a constant-time behavior by construction. This supports Smart cards, secure elements, and HSMs.
• Secure boot The ASP can be considered as a coprocessor sitting next to a general-purpose processor, similar to a Secure Element (SE) or Trusted Platform Module (TPM) and do additional verification of system initialization step. An ASP might even replace part of the SE or TPM functionality.
• Military / defense systems Defense systems must be sovereign and hardened. With an ASP the software stack is the one application itself, no OS to compromise, no general-purpose core to exploit, and a small state machine that can be verified.
• Autonomous Drone Control Autonomous drones run a fixed flight-control application far from the operator. That application is exactly one thing: read sensors, compute the control loop, drive the motors. An ASP executes it deterministically, with guaranteed cycle times and no general-purpose code path that could be hijacked, a compromise in the communication or AI software cannot become a takeover of the flight control.

The publications behind this post

The work behind this post is available in the publications:

• HDL FSM Code Generation Using a MIPS-based Assembler, ISIE 2019
• A Modern Approach to Application Specific Processors for Improving the Security of Embedded Devices, IECON 2021
• Hardware-Enabled Sovereignty: Securing Military Systems Through a Novel and Resilient Defense Architecture, CyCon 2026
• Trustworthiness by Structural Elimination, FDL 2026